Most of the power and usefulness of today's digital IC devices can be attributed to the increasing levels of integration. More and more components (resistors, diodes, transistors, and the like) are continually being integrated into the underlying chip, or IC. The starting material for typical ICs is very high purity silicon. The material is grown as a single crystal and takes the shape of a solid cylinder. This crystal is then sawed (like a loaf of bread) to produce wafers typically 10 to 30 cm in diameter and 250 microns thick.
The geometry of the features of the IC components is commonly defined photographically through a process known as photolithography. Very fine surface geometries can be reproduced accurately by this technique. The photolithography process is used to define component regions and build up components one layer on top of another. Complex ICs can often have many different built-up layers, each layer having components, each layer having differing interconnections, and each layer stacked on top of the previous layer. The resulting topography of these complex IC's often resembles familiar terrestrial "mountain ranges," with many "hills" and "valleys," as the IC components are built up on the underlying surface of the silicon wafer.
In the photolithography process, a mask image, or pattern, defining the various components, is focused onto a photosensitive layer using ultraviolet light. The image is focused onto the surface using the optical means of the photolithography tool and is imprinted into the photosensitive layer. To build ever smaller features, increasingly fine images must be focused onto the surface of the photosensitive layer, i.e. optical resolution must increase. As optical resolution increases, the depth of focus of the mask image correspondingly narrows. This is due to the narrow range in depth of focus imposed by the high numerical aperture lenses in the photolithography tool. This narrowing depth of focus is often the limiting factor with regard to the degree of resolution obtainable, as well as the limiting factor in regard to the smallest components obtainable using the photolithography tool. The extreme topography of complex ICs, the "hills" and "valleys," exaggerates the effects of decreasing depth of focus. Thus, in order to properly focus the mask image defining sub-micron geometries onto the photosensitive layer, a precisely flat surface is desired. The precisely flat (i.e. fully planarized) surface will allow for extremely small depths of focus which, in turn, will allow the definition and subsequent fabrication of extremely small components.
Chemical-mechanical polishing (CMP) is the preferred method of obtaining full planarization of a wafer. It involves removing a portion of a sacrificial layer of dielectric material using mechanical contact between the wafer and a moving polishing pad saturated with slurry. Polishing flattens out height differences, since high areas of topography (hills) are removed faster than areas of low areas of topography (valleys). Polishing is the only technique with the capability of smoothing out topography over millimeter scale planarization distances leading to maximum planarization angles of much less than one degree after polishing.
FIG. 1A shows a top down view of a CMP machine 100 and FIG. 1B shows a side view of the CMP machine 100. The CMP machine 100 is fed wafers to be polished. The CMP machine 100 picks up the wafers with an arm 101 and places them onto a rotating polishing pad 102. The polishing pad 102 is made of a resilient material and is textured, often with a plurality of predetermined groves 103, to aid the polishing process. The polishing pad 102 rotates on a platen 104, or turn table located beneath the polishing pad 102, at a predetermined speed. A wafer 105 is held in place on the polishing pad 102 and the arm 101 by a carrier ring 112 and a carrier film 106. The lower surface of the wafer 105 rests against the polishing pad 102. The upper surface of the wafer 105 is against the lower surface of the carrier film 106 of the arm 101. As the polishing pad 102 rotates, the arm 101 rotates the wafer 105 at a predetermined rate. The arm 101 forces the wafer 105 into the polishing pad 102 with a predetermined amount of down force. The CMP machine 100 also includes a slurry dispense arm 107, extending across the radius of the polishing pad 102. The slurry dispense arm 107 dispenses a flow of slurry onto the polishing pad 102.
The slurry is a mixture of de ionized water and polishing agents designed to aid chemically the smooth and predictable planarization of the wafer. The rotating action of both the polishing pad 102 and the wafer 105, in conjunction with the polishing action of the slurry, combine to planarize, or polish, the wafer 105 at some nominal rate. This rate is referred to as the removal rate. A constant and predictable removal rate is important to the uniformity and through-put performance of the wafer-fabrication process. The removal rate should be expedient, yet yield precisely planarized wafers, free from surface anomalies. If the removal rate is too slow, the number of planarized wafers produced in a given period of time decreases, hurting wafer through-put of the fabrication process. If the removal rate is too fast, the CMP planarization process will not be uniform across the surface of the wafers, hurting the yield of the fabrication process.
To aid in maintaining a stable removal rate, the CMP machine 100 includes a conditioner assembly 120. The conditioner assembly 120 includes a conditioner arm 108, which extends across the radius of the polishing pad 102. An end-effector 109 is connected to the conditioner arm 108. The end-effector 109 includes an abrasive conditioning disk 110 which is used to roughen the surface of the polishing pad 102. The conditioning disk 110 is rotated by the conditioner arm 108 and is translationally moved toward the center of the polishing pad and away from the center of the polishing pad 102, such that the conditioning disk 110 covers the radius of the polishing pad 102. In so doing, conditioning disk 110 covers the surface area of the polishing pad 102, as polishing pad 102 rotates. A polishing pad having a roughened surface has an increased number of very small pits and gouges in its surface from the conditioner assembly 120 and, therefore, produces a faster removal rate via increased slurry transfer to the surface of the wafer. Without conditioning, the surface of polishing pad 102 is smoothened during the polishing process and removal rate decreases dramatically. The conditioner assembly 120 re-roughens the surface of the polishing pad 102, thereby improving the transport of slurry and improving the removal rate.
As described above, the CMP process uses an abrasive slurry on a polishing pad. The polishing action of the slurry is comprised of an abrasive frictional component and a chemical component. The abrasive frictional component is due to the friction between the surface of the polishing pad, the surface of the wafer, and abrasive particles suspended in the slurry. The chemical component is due to the presence in the slurry of polishing agents which chemically interact with the material of the dielectric layer of the wafer. The chemical component of the slurry is used to soften the surface of the dielectric layer to be polished, while the frictional component removes material from the surface of the wafer.
Referring still to FIG. 1A and FIG. 1B, the CMP processing of semiconductor wafers having a tungsten surface layer, or a thin-film surface which includes tungsten components, presents special difficulties. Tungsten CMP is a comparatively more recently developed technique. Tungsten thin-film layers have very different polishing characteristics in comparison to other materials (e.g., silicon dioxide, aluminum, etc.). As a result, tungsten CMP has very different process characteristics during CMP than the other more mature CMP processes (e.g., silicon dioxide CMP).
As described above, the polishing action of the slurry and polishing pad 102 and the polishing motion of arm 101 determines the removal rate and the removal rate uniformity, and, thus, the effectiveness of the CMP process. Process engineers have discovered that in order to obtain sufficiently high and sufficiently stable removal rates for tungsten CMP using conventional CMP machines (e.g., CMP machine 100), a large number of tungsten wafers need to be processed on a respective CMP machine in order to "break-in" the machine's polishing pad (e.g., polishing pad 102). Each of these wafers typically will show different removal rates as they are processed.
For example, in the case of tungsten CMP processing on CMP machine 100, the first of a batch of wafers show very low removal rates. The later processed wafers show much higher removal rates. Each successive wafer processed shows an incrementally higher removal rate. For a typical process, a large number of wafers will need to be processed in order for the removal rate of the tungsten layer of the wafers to increase sufficiently, and perhaps more importantly, nominally to stabilize at a specified level. While the removal rate of CMP machine 100 is unstable (e.g., greatly increasing with each successive wafer) CMP machine 100 is unsuitable for device fabrication processing. Any fabricated device processed by CMP machine 100 and polishing pad 102 would have unpredictable planarity and film thickness, and hence would be non-functional or unreliable.
Consequently, in order adequately to break-in polishing pad 102, a large number of "test wafers" are processed in CMP machine 100. Each of the test wafers have a tungsten surface layer deposited such that it is similar to the tungsten layer of a real wafer containing real devices, and, hence, the costs of these wafers is significant. In addition to the cost of the test wafers, there is a significant time penalty associated with breaking-in each new polishing pad. To attain a nominal removal rate (e.g., 4000 to 5000 Angstroms per minute) 20 to 50 test wafers must be processed, where each wafer consumes a valuable amount of processing time. In addition, the processing of test wafers subtracts from the useful life of the polishing pad 102 since it only has a finite number of polishing cycles before it requires a change out. Another drawback of this conventional method of breaking in polishing pad 102 is the uncertainty associated with the number of test wafers which need to be processed in order properly to breaking a respective polishing pad.
Thus, what is required is a system which greatly reduces the number of test wafers required for properly conditioning (e.g., breaking-in) a polishing pad for a tungsten CMP process. What is required is a system which reduces the cost of properly breaking-in the polishing pad used in a tungsten CMP process. What is further required is a system which decreases the amount of process time required properly to condition a tungsten CMP polishing pad. Additionally, what is required is a system which increases the certainty of the break-in process. The present invention provides a novel solution to the above requirements.